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LTC2209UP Integrated Circuits Linear Technology Datasheet(PDF)

2016-7-30
           

LTC2209UP

LTC2209UP

FEATURES

Sample Rate: 160Msps

77.3dBFS Noise Floor

100dB SFDR

SFDR >84dB at 250MHz (1.5VP-P Input Range)

PGA Front End (2.25VP-P or 1.5VP-P Input Range)

 700MHz Full Power Bandwidth S/H

Optional Internal Dither

Optional Data Output Randomizer

LVDS or CMOS Outputs

Single 3.3V Supply

Power Dissipation: 1.45W

Clock Duty Cycle Stabilizer

Pin-Compatible Family: 

130Msps: LTC2208 (16-Bit), LTC2208-14 (14-Bit)

105Msps: LTC2217 (16-Bit)

64-Pin (9mm × 9mm) QFN Package


APPLICATIONS

Telecommunications

Receivers

Cellular Base Stations

Spectrum Analysis

Imaging Systems

ATE


DESCRIPTION

The LTC?2209 is a 160Msps 16-bit A/D converter designed  for digitizing high frequency, wide dynamic range signals with input frequencies up to 700MHz. The input range of the ADC can be optimized with the PGA front end.

The LTC2209 is perfect for demanding communications applications, with AC performance that includes 77.3dBFS Noise Floor and 100dB spurious free dynamic range (SFDR). Ultra low jitter of 70fsRMS allows undersampling of high input frequencies with excellent noise performance. Maximum DC specs include ±5LSB INL, ±1LSB DNL (no missing codes).

The digital output can be either differential LVDS or single-ended CMOS. There are two format options for the CMOS outputs: a single bus running at the full data rate or demultiplexed busses running at half data rate. A separate output power supply allows the CMOS output swing to range from 0.5V to 3.6V.

 

 

 

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